| 欧盟限制某些有害物质的使用 | Not Compliant |
| ECCN (US) | 3A991 |
| Part Status | LTB |
| HTS | 8542.39.00.01 |
| Family Name | Stratix® II GX |
| User I/Os | 361 |
| Process Technology | 90nm |
| Number of I/O Banks | 6 |
| Operating Supply Voltage (V) | 1.2 |
| Shift Registers | Utilize Memory |
| Logic Elements | 33880 |
| Number of Multipliers | 64 (18x18) |
| Program Memory Type | SRAM |
| Embedded Memory (Kbit) | 1337.6 |
| Total Number of Block RAM | 1+144+202 |
| IP Core | PowerPC/SH/1960 System Controller|Viterbi Compiler, High-Speed Parallel Decoder|Video LVDS SerDes Transmitter/Receiver|RapidIO to AXI Bridge Controller (RAB)|Viterbi Compiler, Low-Speed/Hybrid Serial Decoder |
| Provider Name | Altera/CAST, Inc/Microtronix Inc/Mobiveil, Inc/Eureka Technology Inc |
| Device Logic Units | 33880 |
| Number of Global Clocks | 16 |
| Device Number of DLLs/PLLs | 4 |
| Transceiver Channels | 4 |
| Transceiver Speed (Gbps) | 6.375 |
| Dedicated DSP | 16 |
| Programmability | No |
| Reprogrammability Support | No |
| Copy Protection | No |
| Opr. Frequency (MHz) | 609.76 |
| In-System Programmability | Yes |
| Speed Grade | 5 |
| GMACs | 16.8 |
| Mega Multiply Accumulates per second | 16800 |
| Differential I/O Standards | LVDS|LVPECL |
| Single-Ended I/O Standards | LVTTL|LVCMOS|SSTL|HSTL |
| Maximum I/O Performance | 6.375Gbps |
| External Memory Interface | DDR2 SDRAM|QDRII+SRAM|RLDRAM II |
| Minimum Operating Supply Voltage (V) | 1.15 |
| Maximum Operating Supply Voltage (V) | 1.25 |
| I/O Voltage (V) | 1.8|1.2|3.3|2.5|1.5 |
| Minimum Operating Temperature (°C) | 0 |
| Maximum Operating Temperature (°C) | 85 |
| Supplier Temperature Grade | Commercial |
| Tradename | Stratix |
| Standard Package Name | BGA |
| Pin Count | 780 |
| Supplier Package | FC-FBGA |
| Mounting | Surface Mount |
| Package Height | 3(Max) |
| Package Length | 29 |
| Package Width | 29 |
| PCB changed | 780 |
| Lead Shape | Ball |
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